insideHPC

The Role of Middleware in Optimizing Vector Processing

A new whitepaper from NEC X delves into the world of unstructured data and explores how vector processors and their optimization software can help solve the challenges of wrangling the ever-growing ...
Network World

Cray to unite scalar, vector computer architectures

Cray plans to create a new supercomputing platform combining four types of processing capability in a blade server architecture. Cray Inc. plans to create a new supercomputing platform combining four ...
Semiconductor Engineering

Multi-Core Architecture Optimized For Time-Predictable Neural Network Inference (FZI, KIT)

A new technical paper titled “MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference” was published by researchers at FZI Research Center for Information ...
EDN

Putting a polyphase filter in processor array

While most articles in this section discuss the reprogramming of graphics processors, other large arrays of processing elements are available as standard-product ICs for other applications. In some ...
Design And Reuse

AI is stress-testing processor architectures and RISC-V fits the moment

Modern AI workloads demand new operators, execution patterns, precision formats, and data-movement behaviors. Supporting them requires coordinated changes across instruction sets, microarchitectures, ...
The Next Platform

Arm’s v9 Architecture Explains Why Nvidia Needs To Buy It

Many of us have been wracking our brains why Nvidia would spend a fortune – a whopping $40 billion – to acquire Arm Holdings, a chip architecture licensing company that generates on the order of $2 ...
EDN

Silicon implementation of a reconfigurable processor array

Virtually every microprocessor and DSP in use today uses the stored-program concept designed by Hungarian mathematician John von Neumann more than 50 years ago. Using this architecture, programs and ...