Implementation of a modular cache data structure, to simulate the working of multiple cache level hierarchy design with victim cache for multiple configurations (cache size, block size and ...
A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven.
Developed a flexible cache simulator which implemented L1 cache, its Victim cache and L2 cache. Analyzed the performance of various memory hierarchy configurations with varying parameters and ...